ADP5003CP-EVALZ: 2.5V @ 3A, 4.2 ~ 15V in, Buck

Summary

The ADP5003CP-EVALZ evaluation board demonstrates the functionality of the ADP5003 dc-to-dc converter and low noise low dropout regulator (LDO). Use the ADP5003CP-EVALZ to evaluate simple device measurements such as line regulation, load regulation, and efficiency. Device features include the buck regulator in fixed output or in adaptive headroom control and syncing the operating frequency to the external clock.

The ADP5003 integrates a high voltage buck regulator and an ultralow noise low dropout (LDO) regulator in a small, 5 mm × 5 mm, 32-lead LFCSP package to provide highly efficient and quiet regulated supplies. The ADP5003 can operate in one of two modes. Adaptive mode allows the LDO to operate with set headroom by adjusting the buck output voltage internally. Alternatively, the ADP5003 can operate in independent mode, where both regulators operate separately from each other, and where the output voltages are programmed using resistor dividers.

The LDO regulator output can be accurately controlled at the point of load (POL) using remote sensing that compensates for the printed circuit board (PCB) trace impedance while delivering high output currents.

Specifications

Manufacturer	Analog Devices Inc.
Category	AC/DC and DC/DC Conversion
Sub-Category	DC/DC SMPS - Single Output
Eval Board Part Number	ADP5003CP-EVALZ-ND
Eval Board Supplier	Analog Devices Inc.
Eval Board	Normally In Stock
Topology	Step Down
Outputs and Type	1 Non-Isolated
Voltage Out: Factory Set	2.5 V
Current Out	3 A
Voltage In	4.2 ~ 15 V
Efficiency @ Conditions	>85%, 5V in, 2.5V @ 0.25 ~ 2.5 A
Voltage Out Range	0.6 ~ 5 V
Features	Current Limit (Adj. or Fixed) LDO Regulator(s), On-Chip Over Current Protection Over Voltage Protection Power Good Output Remote Sensing Shutdown, Enable, Standby Soft Start Synchronizable Thermal Protection Under Voltage Protection, Brown-Out
Switching Frequency	300 kHz ~ 2.5 MHz
Standby Current [Typical]	5 µA
Quiescent Current [Typical]	500 µA
Component Count + Extras	28 + 28
Internal Switch	Yes
Design Author	Analog Devices
Application / Target Market	FPGA / DSP / Processors Point of Load (PoL)
Standby Current [Maximum]
Quiescent Current [Maximum]
Main I.C. Base Part	ADP5003
Date Created By Author	2017-11
Date Added To Library	2018-03